Cabled external interconnects §
Cabled external interconnects are detachable copper cable assemblies that connect separate devices: a laptop to a dock, a server to a switch, a console to a TV, a motherboard to a drive. They are relevant whenever two independent, separately-powered devices must exchange data over a link a user can plug and unplug — which means the cable must also solve problems board traces never face: hot-plug (the link comes up live, without resetting either end), EMI compliance (the cable is an antenna, and regulators limit what it may radiate), power delivery (the cable often carries watts alongside bits), and length (metres, not centimetres, so conductor loss accumulates).
Each family below solves a different job:
- USB solves peripherals: one host enumerating a tree of keyboards, cameras, and drives.
- Thunderbolt solves docking and expansion: collapsing PCIe, display, and USB into one cable.
- Ethernet over copper solves peer local networking: symmetric links between equals, up to 100 m.
- SATA solves storage: a simple host-to-drive block pipe.
- HDMI / DisplayPort solve display: a one-way, low-latency video stream to a sink.
They all ride the same physics — differential signalling over twisted, shielded copper — and they all hit the same wall: attenuation that grows with frequency and length (Electromagnetism). The sections below go from the most familiar job (peripherals) to the most specialised (display), then step back to the shared physics that sets every “max cable length” number you have ever read on a box.
Authoritative sources
Brief history §
- 1960s–1987 — The legacy era. RS-232 serial terminals and modems, then analog VGA video (1987), established the detachable cable as a product category: slow, unidirectional or point-to-point, with no negotiation — the user set the parameters by hand.
- 1995–2003 — Hot-plug serial peripherals. FireWire (IEEE 1394, 1995) and USB 1.0 (1996) replaced the tangle of parallel ports with hot-pluggable serial cables; USB’s host-enumerated tree won on cost. SATA (2003) did the same inside the box, replacing the wide grey PATA ribbon.
- 2002–2010 — Digital video and 10 Gb/s copper. HDMI (2002) and DisplayPort (2006) digitised the display cable; 10GBASE-T (IEEE 802.3an, 2006) pushed twisted-pair copper to 10 Gb/s over 100 m using PAM16 modulation and heavy digital signal processing.
- 2015–present — Convergence on USB-C. Thunderbolt 3 (2015) tunnelled PCIe and DisplayPort over the USB-C connector; USB4 (2019) adopted that tunnel architecture as a standard; USB4 v2 (USB-IF, 2022) and Thunderbolt 5 (spec finalised 2024) doubled it again to 80 Gb/s per direction using PAM3 signalling. One cable type now covers peripherals, docks, displays, and networking.
Categorisation §
The five classes are separated by the fundamental job and topology of the link — who talks to whom, and in what pattern. That axis is more fundamental than connector shape or era: it determines the protocol (does a host enumerate? do peers contend? is the stream one-way?), and the protocol determines what the cable must carry.
| Page | Job & topology | Signalling & medium | Max length | Line rate | Examples |
|---|---|---|---|---|---|
| USB | Host–device peripheral tree; host enumerates up to 127 devices | Differential pairs, NRZ (≤20 Gb/s) or PAM3 (80 Gb/s); USB-C or legacy connectors | ~2–5 m passive | 1.5 Mb/s – 80 Gb/s | USB 1.0–3.2, USB4, USB-C PD |
| Thunderbolt | Expansion & docking; tunnels PCIe + DisplayPort over one cable, daisy-chained | PAM3 differential pairs over the USB-C connector | 0.8 m passive, ~3 m active | 40–80 Gb/s per direction (120 Gb/s asymmetric) | Thunderbolt 3/4/5 |
| Ethernet (copper) | Peer LAN; switched star of equals | PAM5 / PAM16 (DSQ128) over 4 balanced twisted pairs | 100 m (Cat 6a); 30 m (Cat 8, 25/40GBASE-T) | 1–10 Gb/s; 25/40 Gb/s short reach | 1000BASE-T, 10GBASE-T, 25GBASE-T |
| SATA | Storage block I/O; point-to-point host ↔ drive | One differential pair each way, 8b/10b coded | 1 m | 1.5 / 3 / 6 Gb/s | SATA 1.0–3.0, eSATA |
| DisplayPort & HDMI | Display stream; one-way source → sink video + audio | TMDS (HDMI) or 8b/10b & 128b/132b differential lanes (DisplayPort) | ~3 m passive; 100 m active-optical | 4.95–48 Gb/s (HDMI), 8.64–80 Gb/s (DP 2.1) | HDMI 1.0–2.1, DisplayPort 1.4/2.1, DVI |
The boundary between these families and the board-level interconnects they attach to is a packaging boundary, not a physics boundary: a USB4 host is internally a PCIe root complex whose lanes are re-timed onto a cable; a SATA drive is internally an NVMe-like flash controller fed by a SATA PHY. And when a run exceeds what copper can drive — a 300 m link between buildings — the job passes to optical interconnects.
The shared physics: why every cable has a length limit §
Definition. A cable is a lossy transmission line: signal power decays exponentially with length, and the decay constant grows with frequency because of the skin effect — at high frequency, current crowds into a thin layer of depth at the conductor surface, shrinking the effective cross-section and raising resistance as .
Details
Drag the frequency slider: the shaded ring is where the current actually flows in a copper conductor of a twisted-pair cable (radius 250 µm, like a Cat 6a strand). Depth (copper) ≈ µm.
The consequence is exponential: attenuation in dB per metre grows roughly as , so every generation that doubles the data rate either shortens the maximum cable, thickens the conductors, adds active re-timers, or encodes more bits per symbol (which needs more SNR — see Communication). That single trade-off explains almost every number in the table below.
Example problem
A Cat 6a strand has radius 250 µm. At 400 MHz (the Nyquist bandwidth of one 10GBASE-T pair), what fraction of the conductor’s cross-section carries current, and roughly how many times higher is the AC resistance than the DC resistance?
Solution
µm. Since , current flows in a shell of area ≈ , i.e. a fraction of the cross-section. The AC resistance is roughly the DC resistance — which is why a 100 m 10GBASE-T link needs DSP, crosstalk cancellation, and strong FEC to close.
Bandwidth vs. cable length, interactively §
The chart below compares the reach of the main cabled interfaces. Solid segments are passive copper (wire only); dashed segments need active electronics in the connector; dotted segments are fibre. Drag the length cursor to see which interfaces survive at that distance.
Notice the pattern: rate and reach trade off. SATA trades reach (1 m) for simplicity and cost; 10GBASE-T trades silicon complexity (PAM16, precoding, LDPC) for 100 m; USB4/Thunderbolt buy 80 Gb/s by accepting sub-metre passive cables and re-timers beyond that.
USB (peripherals) §
Definition. USB is a hot-pluggable, host-enumerated serial bus: one host polls a tree of up to 127 devices. USB4 v2 (2022) carries 80 Gb/s per direction over USB-C using PAM3, and tunnels USB 3, DisplayPort, and (optionally) PCIe traffic as packets over those lanes.
Details
USB’s defining choice is the host-device tree: devices never talk to each other, only to the host, which assigns each an address during enumeration when it is plugged in. This makes devices cheap and hot-plug trivial, at the cost of host overhead. Power is part of the spec: 5 V at up to 500 mA (USB 2.0 unit load), 900 mA (USB 3.0), and up to 240 W with USB-C Power Delivery 3.1 (48 V, 5 A).
The USB-C connector carries all of this over 24 pins arranged in two mirrored rows — which is why it is reversible: either row can serve as the active one, and the CC pins tell the host which orientation was inserted.
Example problem
A USB 3.2 Gen 2×2 (20 Gb/s) external SSD is connected to a laptop. The SSD’s internal NVMe interface is PCIe Gen 3 ×4 (~3.94 GB/s effective). What is the bottleneck?
Solution
USB 3.2 Gen 2×2: 20 Gb/s line rate ≈ 2 GB/s after 128b/132b coding overhead. The internal NVMe link can deliver ~3.94 GB/s. The USB cable (≈2 GB/s) is the bottleneck: the SSD can deliver at most ~2 GB/s to the host, no matter how fast its flash is. This is why USB4 (which tunnels the NVMe drive’s native PCIe instead of translating it to USB storage protocol) made external SSDs dramatically faster.
Thunderbolt (docking & expansion) §
Definition. Thunderbolt is a cabled expansion interface that tunnels PCIe and DisplayPort — the two buses a computer already speaks internally — over a single USB-C cable, daisy-chained across up to six devices. Thunderbolt 5 (spec finalised 2024) provides 80 Gb/s in each direction simultaneously (full duplex), with a 120 Gb/s asymmetric boost for video-heavy setups, using PAM3 signalling.
Details
Thunderbolt’s insight is that a dock should not translate protocols: it should carry the computer’s native buses. A Thunderbolt host packets PCIe transactions and DisplayPort video into “tunnels” over the same differential lanes, and a dock unpacks them to real PCIe slots, display connectors, and Ethernet. USB4 (2019) adopted this tunnel architecture — the difference is that Thunderbolt guarantees PCIe tunneling, while USB4 makes it optional.
Worked example — the eGPU. An external GPU enclosure contains a graphics card on a PCIe slot, tunnelled to the host. Real enclosures tunnel PCIe Gen 3 ×4: 32 Gb/s raw, ≈ 3.9 GB/s effective after 128b/130b coding. Check it against the cable:
- USB4 Gen 3×2 / Thunderbolt 3/4: 40 Gb/s per direction (full duplex) ≈ 5 GB/s. The 3.9 GB/s PCIe tunnel fits, leaving ~1 GB/s for a display tunnel — this is why 40 Gb/s eGPUs work but are the ceiling.
- Thunderbolt 5 / USB4 v2: 80 Gb/s per direction ≈ 10 GB/s. Two PCIe Gen 3 ×4 tunnels, or one Gen 4 ×4 (64 Gb/s raw ≈ 7.9 GB/s effective), now fit.
- No cable interface serves a GPU that needs 32 GB/s of host transfer (e.g. streaming large model weights every step): that exceeds even 10 GB/s, and needs a direct PCIe Gen 5 ×16 slot (64 GB/s) on the board level.
Example problem
A Thunderbolt 5 dock connects a workstation to two 4K60 displays, a 10 Gb/s Ethernet adapter, and an NVMe SSD that reads at 2 GB/s. All traffic flows away from the host except display video (toward the displays). Does the downstream direction have capacity?
Solution
Downstream budget: two 4K60 streams ≈ 2 × 12.5 Gb/s = 25 Gb/s; assume a worst-case 10 Gb/s of downstream network traffic; SSD reads go upstream, so they do not count against downstream. Worst case downstream ≈ 25 + 10 = 35 Gb/s < 80 Gb/s. It fits with room to spare — and note the per-direction accounting: the SSD’s 16 Gb/s of read traffic rides the upstream 80 Gb/s, which is why full-duplex links make docks practical.
Ethernet over copper (peer LAN) §
Definition. Ethernet over twisted pair (IEEE 802.3) is the cabled LAN physical layer: four balanced twisted pairs, 100 m at 1–10 Gb/s (1000BASE-T, 10GBASE-T), and 25/40 Gb/s over 30 m of Cat 8 (802.3bq). 10GBASE-T encodes with PAM16 and the DSQ128 constellation across pairs, with Tomlinson–Harashima precoding and LDPC forward error correction.
Details
Ethernet’s topology is the opposite of USB’s: peers, joined through switches in a star. No host enumerates anybody; every port negotiates speed and duplex with its link partner automatically (autonegotiation), then the PHYs train on the actual cable before committing to a rate — which is why the cable category, not the port speed, sets the ceiling on a marginal run.
The protocol layers above the PHY (framing, MAC, switching, IP, TCP) are covered in Networks. For runs beyond 100 m, or between buildings, the same Ethernet frames move to fibre — see Optical interconnects (10GBASE-R vs. 10GBASE-T).
The full treatment — the cable-category table (bandwidths, shielding, certified 10GBASE-T reach per category), the PAM5 → PAM16/DSQ128 signalling story, echo/NEXT/FEXT cancellation, autonegotiation and link training, the copper-vs-fibre crossover, and the Shannon-capacity worked example for one twisted pair — is on the Ethernet over copper page, together with an interactive link-budget simulator.
SATA (storage) §
Definition. SATA (Serial ATA) is a point-to-point host-to-drive storage link: one differential pair in each direction, 8b/10b coded, at 1.5, 3, or 6 Gb/s (SATA 3.0, 2009). The 7-pin data connector carries only the two differential pairs and three grounds; power arrives on a separate 15-pin connector.
Details
SATA (2003) replaced the wide PATA ribbon with two thin differential pairs — the same serialisation wave that produced PCIe at the board level. The protocol is a simple command/response exchange of Frame Information Structures (FISs): the host sends a command FIS, the drive returns data and status FISs, with CRC on every frame. Maximum cable length is 1 m; the external variant eSATA adds shielding for the same 1–2 m.
Example. A 2.5-inch SATA SSD reads at 550 MB/s. The SATA 3.0 link is 6 Gb/s line rate; after 8b/10b coding that is 600 MB/s of payload. The drive is using 550/600 ≈ 92% of the link — the link, not the flash, is the bottleneck, which is why fast SSDs moved to NVMe over PCIe (≈ 3.94 GB/s for Gen 3 ×4, with a deeper command-queue protocol).
Example problem
A SATA 3.0 SSD reports 550 MB/s sequential read. What fraction of the SATA payload capacity is it using, and where does the rest go?
Solution
550/600 ≈ 92%. The remaining ~8% is protocol overhead: FIS framing, CRC, primitive symbols (SYNC, HOLD) between frames, and command turnaround — the drive is never purely streaming data.
DisplayPort & HDMI (display) §
DisplayPort and HDMI are the one-way, latency-critical video links from a source (GPU) to a sink (monitor or TV): HDMI dominates TVs and consoles, DisplayPort monitors and docks. HDMI carries video as three TMDS lanes plus a clock lane (up to 18 Gb/s, or 48 Gb/s with Fixed Rate Link in HDMI 2.1); DisplayPort sends packetised video over 1–4 lanes (up to 32.4 Gb/s in DP 1.4, 80 Gb/s with UHBR in DP 2.1) and can carry several displays over one cable via MST. Because DisplayPort is packetised, it is the video protocol tunnelled inside Thunderbolt and USB4 — which is why docks speak DisplayPort. The full treatment — the bandwidth-budget arithmetic, link training, USB-C Alt Mode, HDCP and adaptive sync — is on the DisplayPort and HDMI page.
Legacy interconnects §
Three older cabled interfaces complete the historical picture, and their ideas survive inside the modern ones:
- RS-232 (1960s): single-ended ±12 V serial, point-to-point, no negotiation. Its framing (start bit, data bits, stop bit) is the ancestor of every UART, and it survives in industrial equipment and console ports.
- VGA (1987): analog RGB over 15 pins, video as voltages rather than bits — the reason display cables moved to digital (HDMI/DP): digitise at the source, not at the end of a lossy analog cable.
- FireWire (IEEE 1394) (1995): USB’s contemporary and first rival — peer-to-peer rather than host-device, with guaranteed isochronous bandwidth, which made it beloved for audio/video. It lost to USB on cost and licensing simplicity, but its isochronous-stream idea lives on in DisplayPort’s timed streams and USB’s isochronous transfer type.
Quiz §
Example problem
A building is wired wall-to-wall with Cat 6 cable, and the longest run is 70 m. You need to deliver 10 Gb/s Ethernet over that run without rewiring. Why does plain 10GBASE-T fail, and what are two workable options?
Solution
10GBASE-T is specified for 100 m only over Cat 6a (500 MHz, tighter twist, better alien-crosstalk isolation). Over Cat 6, the standard (TIA TSB-155) certifies 10GBASE-T only to 55 m — at 70 m the crosstalk and attenuation exceed what the PAM16/DSQ128 receiver can equalise, so the link will not close reliably. Options:
- Drop to 5GBASE-T (IEEE 802.3bz, 2016): it reuses 10GBASE-T’s DSP at lower spectral demand and runs at full 100 m on Cat 6 (even Cat 5e) — half the speed, but no rewiring.
- Convert to fibre for that run: a pair of media converters with a short fibre patch solves the length outright, since fibre’s attenuation is far lower per metre — see Optical interconnects.
(Replacing the run with Cat 6a is the third, obvious-but-disruptive option.)
Related pages §
- USB, Thunderbolt, Ethernet (copper), SATA, DisplayPort & HDMI — the five families, one explanation page each.
- Board-level interconnects — the PCIe and NVMe links that USB4 tunnels and SATA drives contain; the same transmission-line physics at centimetre scale.
- Optical interconnects — what takes over when copper’s length limit is hit (fibre Ethernet, 10GBASE-R).
- Electromagnetism — the skin effect, radiation, and crosstalk from first principles.
- Networks — the protocol layers (Ethernet MAC, IP, TCP) that ride on the copper PHY.
- Communication — Shannon capacity and error correction, which set the SNR budgets used above.